AI2001_Category-Source_Code-SC-SystemVerilog and AI2001_Category-Source_Code-SC-Verilog-AMS

Maintenance 0/25
Adoption 3/25
Maturity 9/25
Community 12/25
Maintenance 0/25
Adoption 2/25
Maturity 9/25
Community 12/25
Stars: 3
Forks: 1
Downloads:
Commits (30d): 0
Language: R
License: GPL-3.0
Stars: 2
Forks: 1
Downloads:
Commits (30d): 0
Language: R
License: GPL-3.0
Stale 6m No Package No Dependents
Stale 6m No Package No Dependents

About AI2001_Category-Source_Code-SC-SystemVerilog

seanpm2001/AI2001_Category-Source_Code-SC-SystemVerilog

🧠️🖥️2️⃣️0️⃣️0️⃣️1️⃣️💾️📜️ The sourceCode:SystemVerilog category for AI2001, containing SystemVerilog programming language datasets

Provides curated SystemVerilog source code datasets designed for training AI models on hardware description language patterns and syntax. Part of the larger AI2001 framework, it organizes HDL code samples by category to enable machine learning applications in hardware design and verification domains. The project is structured as a modular subcategory within AI2001's source code collection, facilitating scalable dataset contribution and version control for SystemVerilog-specific training corpora.

About AI2001_Category-Source_Code-SC-Verilog-AMS

seanpm2001/AI2001_Category-Source_Code-SC-Verilog-AMS

🧠️🖥️2️⃣️0️⃣️0️⃣️1️⃣️💾️📜️ The sourceCode:Verilog-AMS category for AI2001, containing Verilog-AMS programming language datasets

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