NYU-MLDA/OpenABC
OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph level prediction problems in chip design.
The dataset comprises 29 open-source hardware IPs synthesized through 1,500 random synthesis flows using yosys-abc, capturing initial, intermediate, and final AIGs with labels including graph statistics, atomic transformation sequences, and post-mapping area/delay metrics. Data is pre-converted to PyTorch-Geometric format for direct ML consumption, eliminating costly preprocessing while supporting QoR prediction, area/delay estimation, and self-supervised learning tasks. The complete dataset (1.4TB across 14 chunks) and ML-ready variant (19GB) are hosted separately, with the generation pipeline automatable via provided Python utilities for synthesis scripting, AIG-to-GraphML conversion, and PyG serialization.
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Stars
144
Forks
24
Language
Verilog
License
BSD-3-Clause
Category
Last pushed
Jul 23, 2025
Commits (30d)
0
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