fengbintu/Neural-Networks-on-Silicon
This is originally a collection of papers on neural network accelerators. Now it's more like my selection of research on deep learning and computer architecture.
Curated repository of peer-reviewed AI chip and accelerator papers spanning architecture, circuit design, and system optimization across top-tier conferences (ISCA, MICRO, ASPLOS, DAC, ISSCC) from 2014–2026. Organizes research by publication venue and year, enabling systematic tracking of accelerator design trends including dataflow optimization, memory hierarchies, approximate computing, and emerging technologies like ReRAM and 3D DRAM integration. Complements author's own contributions in neuromorphic computing and hardware-software codesign for neural network inference.
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