ModelTC/LightTTS

Employs a decoupled encode–LLM–decode architecture with separate processes for each module, enabling efficient task parallelism and CPU-GPU resource optimization. Built on LightLLM's inference acceleration techniques, it features a shared-memory LRU cache for speaker embeddings and supports TensorRT/JIT compilation for the flow encoder/decoder. Provides both HTTP REST APIs and WebSocket bi-streaming endpoints for real-time interactive speech synthesis with minimal latency.